1. Field of the Invention
This invention relates to a memory system, and more particularly, a memory system that is able to generate notification signals whenever an operation is completed.
2. Description of the Prior Art
To ensure reliability of memory devices, testing process is necessary before assembling memory devices to systems. However, before a memory device is assembled to the system, the testing process usually requires a test circuit for providing testing signals to the memory device and a clock generator for providing the clock signal required by the memory device. Since the size of a memory device can be rather small and the signal connections of the memory device can be very complicated, some of memory devices may include built-in test circuits, that is, the built-in self-test circuits, to simplify the manual efforts for signal connections.
However, an external clock generator such as a phase lock loop circuit for providing the clock signal may still be required. Since the phase lock loop circuit and the memory device are different types of devices, the extra phase lock loop circuit may require different manufacturing process from the manufacturing process of the memory macro of the memory device. Consequently, the manufacturing process can be complicated, the cost may be raised, and yield may be reduced.
Furthermore, when testing the highest frequency of the memory device, one has to adjust the clock generator gradually according to the condition of the memory device, and the memory speed limitation tested is bounded by the highest frequency of the clock generator. Therefore the testing process can be time consuming and inaccurate. How to test the memory device efficiently without adding complicated extra circuit has become an issue to be solved.